The present invention relates to a phase-change memory cell and a method of operating a phase-change memory cell.
For data storage, phase-change memory cells may be used. A typical configuration of a phase-change memory cell comprises a phase-change material arranged between and coupled to at least two electrodes. When the phase-change memory cell is in use, the phase-change material is operated in one of at least two reversibly transformable phases, an amorphous phase and a crystalline phase, these phases of the phase-change material being distinct from one another, in that, in the amorphous phase, the phase-change material has a discernibly higher resistance, by up to a few orders of magnitude, compared to the crystalline phase thereof. In order to facilitate a phase transition, energy is supplied to the phase-change material such as, for example, electrical energy, thermal energy, any other suitable form of energy or combination thereof that may effectuate a desired phase transition.
For example, to facilitate a change from the crystalline phase to the amorphous phase, an electrical signal such as a voltage pulse may be applied to one of the electrodes, such an electrode being hereinafter generally referred to as a heater electrode, whereby the characteristics of the voltage pulse applied to the heater electrode are chosen so as to cause heating of the phase-change material, at the heater electrode or substantially in the vicinity thereof, above its melting temperature and, thereafter, rapid cooling below its glass temperature. The phase-change material that is treated in this way is transformed from the crystalline phase to the amorphous phase and an amorphized area is created in the phase-change material where such a phase-transition has occurred. The size of the amorphized area corresponds to the molten area created by the melting of the phase-change material, and is dependent on the magnitude of the applied voltage. The profile of the amorphized area is defined by a temperature profile that is created in the phase-change material due to the application of the voltage pulse to the heater electrode, the temperature profile being influenced by a geometric design of the phase-change memory cell. Where the phase-change memory cell is designed to have a relatively high resistive area, such as, for example, due to the design used for the heater electrode, a larger voltage drop and a higher temperature will occur compared to other areas of the phase-change memory cell, resulting in the creation of a so-called hotspot in the phase-change material at such an area.
As hereinbefore described, the application of a specific voltage pulse to the heater electrode facilitates the creation of an amorphous area, having a corresponding resistance, in the phase-change material. In order to store information, the resistance of the phase-change memory cell is read out. That is, the resistance between the two electrodes is measured after an amorphous area is created in the phase-change material by the application of a given voltage to the heater electrode. A given resistance that is recorded between the two electrodes is defined by the size/volume of the amorphous area created in the phase-change material and depends on the amorphous aspect and/or crystalline aspect of the phase-change material in the current path that is established between the two electrodes.
Reference is now made to FIG. 1 of the accompanying drawings, which shows an example of a plot of the resistance R recorded between the heater electrode and another electrode of a given phase-change memory cell as a function of the voltage V applied to the heater electrode. The plot shown in FIG. 1 is typically obtained for phase-change memory cells and will hereinafter be generally referred to as an RV curve. The example of FIG. 1 shows RV curves that have been simulated for the heater electrode having a respective radius of 40 nm, 20 nm and 10 nm.
As can be seen from FIG. 1, where the application of a voltage pulse to the heater electrode causes the creation of a relatively small amorphous area in the phase-change material, the resistance between the electrodes of the phase-change memory cell will be recorded as having increased relatively slightly. In this case, the size of the created amorphous area is relatively small and the phase-change material in the current path between the two electrodes may comprise substantially more of a crystalline aspect rather than an amorphous aspect. Thus, the current flowing between the two electrodes will have access to and will preferentially flow through the lower resistance, crystalline aspect of the phase-change material. This scenario is generally marked on FIG. 1 by the arrow 1a. 
Additional increases in the size of the amorphous area formed in the phase-change material, which are facilitated by progressively increasing the magnitude of the voltage applied to the heater electrode, result in correspondingly increased resistance values to be recorded for the phase-change memory cell, this scenario being generally marked by the arrow 1b on FIG. 1. In this case, while the current flowing between the two electrodes still has access to the crystalline aspect of the phase-change material, this is to a lesser extent than in the scenario denoted by arrow 1a and is further reduced with the growth/increased volume of the amorphous aspect of the phase-change material as the magnitude of voltage applied to the heater electrode is increased.
Where the voltage applied to the heater electrode causes the creation of an amorphous area that plugs/blocks the heater electrode, the current flowing between the two electrodes may no longer completely bypass the higher resistance, amorphous aspect of the phase-change material in the current path between the two electrodes and has to flow through it. Furthermore, at least until the current flows through the amorphous aspect, it has relatively little or no access to the lower resistance, crystalline aspect of the phase-change material in the current path between the two electrodes. This scenario is recorded as a steep increase in the resistance of the phase-change memory cell and is denoted by arrow 1c on FIG. 1. Where a magnitude of the voltage applied to the heater electrode is further increased, the size/volume of the amorphous aspect between the two electrodes grows whereas the crystalline aspect of the phase-change material is further reduced. Thus, the current flowing between the two electrodes has to flow through even more of the amorphous aspect and has lesser access to the crystalline aspect compared to the previously-described scenario denoted by arrow 1c, thereby causing the RV curve to plateau as generally shown by arrow 1d on FIG. 1.
As hereinbefore described, information is stored in phase-change memory cells by using a resistance of the phase-change memory cell defined by the size/volume of the amorphous area that is created in the phase-change material for a given voltage being applied to at least an electrode, for example, the heater electrode, of the phase-change memory cell. In this regard, the read out resistance is not subjected to further manipulation for the purpose of addressing information storage in phase-change memory cells. Furthermore, by exploiting only the size/volume aspect of the amorphous area, information storage in phase-change memory cells may be correspondingly limited.
U.S. Pat. No. 7,186,998 discloses a multi-terminal logic device, which includes a phase-change material having crystalline and amorphous states in electrical communication with three or more electrical terminals. The phase-change material is able to undergo reversible transformations between amorphous and crystalline states in response to applied electrical energy where the amorphous and crystalline states show measurably distinct electrical resistances. Electrical energy in the form of current or voltage pulses applied between a pair of terminals influences the structural state and measured electrical resistance between the terminals. In the devices disclosed in this document, independent input signals are provided between different pairs of terminals and the output is measured as the resistance between yet another pair of terminals. Logic functionality is achieved through relationships between the applied input signals and the measured output resistance where the relationship is governed by the effect of the input signals on the structural state and the electrical resistance of the phase-change material. Logic values may be associated with the crystalline and amorphous states of the phase-change material or the measured resistance between a pair of terminals.
U.S. Pat. No. 7,186,998 discloses a method of operating a phase-change memory cell, thereby to achieve a given logic functionality. The disclosed phase-change memory cell has three terminals, whereby the respective input signals applied across two different pairs of terminals may be used to create crystalline or amorphous states in the phase-change material, having corresponding resistances that are discernible from each other and that may be used to represent requisite inputs of a given logic function. An output resistance measured between a third pair of terminals corresponds to the output of the logic function. It is stated in this document that the measured resistance between a pair of electrical terminals may depend not only on the resistance of the chalcogenide material, which is used as the phase-change material, but also on the spatial distribution of crystalline and amorphous regions within the chalcogenide material and the size and position of one or both terminals of a pair relative to the volume of chalcogenide material influenced by a signal applied between the terminals.
U.S. Pat. No. 7,186,998 discloses a method of operating a phase-change memory cell, thereby to achieve logic functionality; it does not disclose and/or address how to provide a range for information storage in phase-change memory cells.
U.S. Patent Application Publication 2011/0096594 discloses techniques for reading phase change memory that mitigate resistance drift. One contemplated method includes applying a plurality of electrical input signals to the memory cell. The method includes measuring a plurality of electrical output signals from the memory cell resulting from the plurality of electrical input signals. The method includes calculating an invariant component of the plurality of electrical output signals dependent on the configuration of amorphous material in the memory cell. The method also includes determining a memory state of the memory cell based on the invariant component. In one embodiment of the invention disclosed in that document, the method further includes mapping the plurality of electrical output signals to a measurements region of a plurality of measurements regions. The measurements regions correspond to memory states of the memory cell.
U.S. Patent Application Publication 2011/0096594 is concerned with deriving a quantity that is dependent on the structural state of the phase-change material, that is, whether it is amorphous or crystalline, but which is different to/not the resistance of the memory cell. The aforementioned quantity is read out by applying multiple electrical signals to a memory cell with a single pair of terminals. U.S. Patent Application Publication 2011/0096594 does not disclose and/or address how to provide a range for information storage in phase-change memory cells.
Accordingly, it is desirable to provide a phase-change memory cell having increased versatility in the way information storage is achieved with ease of implementation and relatively reduced technical complexity.